ⓘ EDA file formats ..

Caltech Intermediate Form

Caltech Intermediate Form is a file format for describing integrated circuits. CIF provides a limited set of graphics primitives that are useful for describing the two-dimensional shapes on the different layers of a chip. The format allows hierarchical description, which makes the representation concise. In addition, it is a terse but human-readable text format.

Design Exchange Format

Design Exchange Format is an open specification for representing physical layout of an integrated circuit in an ASCII format. It represents the netlist and circuit layout. DEF is used in conjunction with Library Exchange Format to represent complete physical layout of an integrated circuit while it is being designed. Def was designed by the design system cadence. Def files are usually created depending on the place and route R&amp R tools and used as input for analysis tools, such as tools for extracting and analyzing power.


EDIF is a vendor-neutral format based on S-Expressions in which to store Electronic netlists and schematics. It was one of the first attempts to establish a neutral data exchange format for the electronic design automation industry. The goal was to establish a common format from which the proprietary formats of the EDA systems could be derived. When customers needed to transfer data from one system to another, it was necessary to write translators from one format to other. As the number of formats multiplied, the translator issue became an N -squared problem. The expectation was that with ...


GDSII stream format, common acronym GDSII, is a database file format which is the de facto industry standard for data exchange of integrated circuit or IC layout artwork. It is a binary file format representing planar geometric shapes, text labels, and other information about the layout in hierarchical form. The data can be used to reconstruct all or part of the artwork to be used in sharing layouts, transferring artwork between different tools, or creating photomasks.

Library Exchange Format

Library Exchange Format is a specification for representing the physical layout of an integrated circuit in an ASCII format. It includes design rules and abstract information about the cells. LEF only the basic information needed at this level to serve the purpose of appropriate CAD software. This helps to save valuable resources, providing only an abstract view and thus consuming less memory resources. LEF is used in conjunction with design exchange format Def to represent complete physical layout of an integrated circuit while it is being developed. LEF has arisen tangentially in its pla ...

Open Artwork System Interchange Standard

Open Artwork System Interchange Standard is a language used by computers to represent and express an electronic pattern for an integrated circuit during its design and manufacture. The language defines the code required for geometric shapes such as rectangles, trapezoids, and polygons. It defines the type of properties each can have, how they can be organized into cells containing patterns made by these shapes and defines how each can be placed relative to each other.

Standard Parasitic Exchange Format

Standard Parasitic Exchange Format is an IEEE standard for representing parasitic data of wires in a chip in ASCII format. Non-ideal wires have parasitic resistance and capacitance that are captured by SPEF. These wires also have inductance that is not included in SPEF. SPEF is used for delay calculation and ensuring signal integrity of a chip which eventually determines its speed of operation. Oz in a closet feeder is the most popular specification for parasitic exchange between different tools of EDA domain at any stage of the design process. Specification for Ozzie in the closet waste l ...